PROCESSORS, METHODS, AND SYSTEMS FETCH AND DECODE AT LEAST TWO IN-ORDER SEQUENCES OF INSTRUCTIONS IN PARALLEL

原文（中文）

A processor of an aspect includes a front end unit. The front end unit is to fetch and decode in parallel a first in-order sequence of instructions and a second in-order sequence of instructions. The first in-order sequence of instructions occurs before the second in-order sequence of instructions in program order. The processor also includes a back end unit coupled with the front end unit. The back end unit is to execute decoded instructions provided from the front end unit. Other processors, methods, systems, and instructions are disclosed.