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TECHNIQUES FOR A PHYSICAL SIDE-CHANNEL-RESILIENT ARTHMETIC LOGIC UNIT

发明专利审中
20权利要求 · 3 独立
§ Ⅰ

卷宗概要

发明人

Santosh GHOSH; Dumitru-Daniel DINU; Joseph FRIEL; Avinash L. VARNA; Manoj R. SASTRY

IPC 分类

G6F 21/60G6F 21/64

CPC 分类

G6F21/602G6F21/64

Examples include techniques for a physical side-channel resilient arithmetic logic unit (ALU) The examples include use of circuitry to input a shared representation of a value having a plurality of shares to the ALU. Then, at the ALU, recombine the shared representation of the value to a single representation of the value and use the single representation to generate a result value or operate on the shared representation of the value to generate a shared representation of the result value. If the result value is based on operating on the single representation of the value, the result value is split to a shared representation of the result value. The shared representation of the result value can be output from the ALU and stored to at least one register from among a plurality of registers.

原文(中文)

Examples include techniques for a physical side-channel resilient arithmetic logic unit (ALU) The examples include use of circuitry to input a shared representation of a value having a plurality of shares to the ALU. Then, at the ALU, recombine the shared representation of the value to a single representation of the value and use the single representation to generate a result value or operate on the shared representation of the value to generate a shared representation of the result value. If the result value is based on operating on the single representation of the value, the result value is split to a shared representation of the result value. The shared representation of the result value can be output from the ALU and stored to at least one register from among a plurality of registers.