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MEMORY DEVICE PERFORMING INFORMATION DATA READ OPERATION AND INFORMATION DATA READ METHOD THEREOF

发明专利审中
20权利要求 · 3 独立
§ Ⅰ

卷宗概要

发明人

Wonkyun Jeong; Hyunkook Park; Sungmook Lim; Ji-Sang Lee

IPC 分类

G11C 16/26G11C 16/4G11C 16/24G11C 16/30

CPC 分类

G11C16/26G11C16/483G11C16/24G11C16/30

A memory device is disclosed which includes a first bit line connected to a first cell string; a second bit line connected to a second cell string and adjacent to the first bit line; and a bit line precharge controller configured to control voltage levels of the first and second bit lines during an information data read operation to read data stored in the first cell string. The bit line precharge controller precharges the first bit line, provides a boost voltage to the second bit line, and then senses the data stored in the first cell string. The precharge voltage level of the first bit line is increased by the boost voltage provided to the second bit line.

原文(中文)

A memory device is disclosed which includes a first bit line connected to a first cell string; a second bit line connected to a second cell string and adjacent to the first bit line; and a bit line precharge controller configured to control voltage levels of the first and second bit lines during an information data read operation to read data stored in the first cell string. The bit line precharge controller precharges the first bit line, provides a boost voltage to the second bit line, and then senses the data stored in the first cell string. The precharge voltage level of the first bit line is increased by the boost voltage provided to the second bit line.