APPARATUSES AND METHODS FOR LINK LOADING INFORMATION INTO FUSE LATCHES
卷宗概要
发明人
Jacob Rice
IPC 分类
CPC 分类
The present disclosure is generally directed to repair solutions for a semiconductor memory device and linking some of the repair solutions together. When fuse bus addresses (FBAs) are generated and transmitted to one or more fuse arrays, a start of a link loading operation is detected based on a respective FBA. The information that is stored at the fuses corresponding to the respective FBA is output for the respective FBA and for one or more subsequent FBAs that are included in the link loading operation. Thus, the same information is output during the link loading operation. Prior to the start of the link loading operation, and/or at the end of the link loading operation, information received from the one or more fuse arrays can be output.
原文（中文）
The present disclosure is generally directed to repair solutions for a semiconductor memory device and linking some of the repair solutions together. When fuse bus addresses (FBAs) are generated and transmitted to one or more fuse arrays, a start of a link loading operation is detected based on a respective FBA. The information that is stored at the fuses corresponding to the respective FBA is output for the respective FBA and for one or more subsequent FBAs that are included in the link loading operation. Thus, the same information is output during the link loading operation. Prior to the start of the link loading operation, and/or at the end of the link loading operation, information received from the one or more fuse arrays can be output.