MICRO-STRUCTURE ARRAY FOR MITIGATION OF HOT SPOTS IN INTEGRATED CIRCUIT PACKAGES
卷宗概要
发明人
Yuan Meng; Seyed Hadi Zandavi; Aastha Uppal; Nabankur Deb; Xiaoqian Li; Je-Young Chang; Trianggono Widodo; Xavier Brun
IPC 分类
CPC 分类
An apparatus comprises a first integrated circuit (IC) die comprising a first surface and a second IC die laterally adjacent to the first IC die comprising a second surface. A structural member over an entirety of the first and second IC dies includes a first side facing the first and second surfaces, a second side opposite the first side, and one or more passive features. The apparatus also comprises a layer of dielectric material contacting the first side and both of the first and second surfaces. The layer may comprise a plurality of first metal features extending between the first side and the first surface, where at least one of the metal features contacts one of the passive features. The structural member may comprise a plurality of second metal features extending between the first and second sides. The passive features may comprise silicon or the second metal features.
原文（中文）
An apparatus comprises a first integrated circuit (IC) die comprising a first surface and a second IC die laterally adjacent to the first IC die comprising a second surface. A structural member over an entirety of the first and second IC dies includes a first side facing the first and second surfaces, a second side opposite the first side, and one or more passive features. The apparatus also comprises a layer of dielectric material contacting the first side and both of the first and second surfaces. The layer may comprise a plurality of first metal features extending between the first side and the first surface, where at least one of the metal features contacts one of the passive features. The structural member may comprise a plurality of second metal features extending between the first and second sides. The passive features may comprise silicon or the second metal features.