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SEMICONDUCTOR DEVICE HAVING CONTACT PLUG CONNECTED TO GATE STRUCTURE ON PMOS REGION

发明专利审中
1权利要求 · 1 独立
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卷宗概要

发明人

Shih-Cheng Chen; Li-Hsuan Ho; Tsuo-Wen Lu; Shih-Hao Liang; Tsung-Hsun Wu; Po-Jen Chuang; Chi-Mao Hsu

IPC 分类

H1L 23/535H1L 21/28H1L 23/528H10D 64/1H10D 64/66H10D 84/1H10D 84/3H10D 84/85

CPC 分类

H1L23/535H1L21/28088H1L23/528H10D64/17H10D64/667H10D84/179H10D84/186H10D84/38H10D84/85

A semiconductor device including a substrate having a NMOS region and a PMOS region; a metal gate extending continuously along a first direction from the NMOS region to the PMOS region on the substrate; a first source/drain region extending along a second direction adjacent to two sides of the metal gate on the NMOS region; a second source/drain region extending along the second direction adjacent to two sides of the metal gate on the PMOS region; a first contact plug landing on the second source/drain region adjacent to one side of the metal gate; a second contact plug landing on the second source/drain region adjacent to another side of the metal gate; and a third contact plug landing directly on a portion of the metal gate on the PMOS region and between the first contact plug and the second contact plug.

原文(中文)

A semiconductor device including a substrate having a NMOS region and a PMOS region; a metal gate extending continuously along a first direction from the NMOS region to the PMOS region on the substrate; a first source/drain region extending along a second direction adjacent to two sides of the metal gate on the NMOS region; a second source/drain region extending along the second direction adjacent to two sides of the metal gate on the PMOS region; a first contact plug landing on the second source/drain region adjacent to one side of the metal gate; a second contact plug landing on the second source/drain region adjacent to another side of the metal gate; and a third contact plug landing directly on a portion of the metal gate on the PMOS region and between the first contact plug and the second contact plug.