Security Device
卷宗概要
发明人
Peter PeßL
IPC 分类
CPC 分类
A security device comprise a sampler configured to, in each iteration of a sequence of iterations, sample a string of n bits, a bit string rejector configured to reject the string of n bits in reaction to an AND combiner generating an AND combination of the sampled bits which is equal to 1, in case a given limit or an integer multiple of the given limit is equal to 2−1, and AND-OR combiner generating an AND combination of the most significant bit of the sampled bits with an OR combination of the other bits of the sampled bits which is equal to 1 in case the given limit is equal to 2+1; and a controller configured stop the sequence of iterations in reaction to a number of strings of n bits which have not been rejected being equal or above a predefined number of bit strings.
原文（中文）
A security device comprise a sampler configured to, in each iteration of a sequence of iterations, sample a string of n bits, a bit string rejector configured to reject the string of n bits in reaction to an AND combiner generating an AND combination of the sampled bits which is equal to 1, in case a given limit or an integer multiple of the given limit is equal to 2−1, and AND-OR combiner generating an AND combination of the most significant bit of the sampled bits with an OR combination of the other bits of the sampled bits which is equal to 1 in case the given limit is equal to 2+1; and a controller configured stop the sequence of iterations in reaction to a number of strings of n bits which have not been rejected being equal or above a predefined number of bit strings.