SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
卷宗概要
申请人
Powerchip Semiconductor Manufacturing Corporation
发明人
Kuen Wei Sung; Hsin Tai; Yi-Hsuan Pai
IPC 分类
CPC 分类
A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a substrate, a first dielectric layer, a storage node contact, a first dummy contact and a second dummy contact. The substrate has a memory device region and a peripheral region. The first dielectric layer is disposed on the substrate. The storage node contact is disposed in the first dielectric layer in the memory device region. The first dummy contact is disposed in the first dielectric layer in the memory device region and is adjacent to a boundary between the memory device region and the peripheral region. The second dummy contact is disposed in the first dielectric layer in the memory device region and is located between the first dummy contact and the storage node contact. The second dummy contact includes a second dielectric layer and a conductive layer located on the second dielectric layer.
原文（中文）
A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a substrate, a first dielectric layer, a storage node contact, a first dummy contact and a second dummy contact. The substrate has a memory device region and a peripheral region. The first dielectric layer is disposed on the substrate. The storage node contact is disposed in the first dielectric layer in the memory device region. The first dummy contact is disposed in the first dielectric layer in the memory device region and is adjacent to a boundary between the memory device region and the peripheral region. The second dummy contact is disposed in the first dielectric layer in the memory device region and is located between the first dummy contact and the storage node contact. The second dummy contact includes a second dielectric layer and a conductive layer located on the second dielectric layer.