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档案
SYSTEMS AND METHODS FOR IMPROVED TESTING OF SYSTEM IMPLEMENTATION GIVEN PARTIALLY DEFINED INPUT VALUES AND EXPECTED OUTPUT VALUES
发明专利审中
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§ Ⅰ
卷宗概要
发明人
SRINIVASAIAH, Nagaraj Mugaluru; BHATT, Devesh; KANNAIYAN, Shanmugavalli; HVOZDOVIC, Jan
申请日
Jun 11, 2025
公开日
Jan 6, 2026
IPC 分类
G06FG06F
CPC 分类
G06FG06FG06FG06F