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MEMORY CONTROLLER, OPERATION METHOD THEREOF, AND MEMORY SYSTEM

发明专利审中
20权利要求 · 3 独立
§ Ⅰ

卷宗概要

发明人

Soonyoung Kang; Dongmin Shin

IPC 分类

G6F 3/6

CPC 分类

G6F3/655G6F3/608G6F3/679

An example memory system includes a memory device and a memory controller. The memory device is configured to read, from a memory cell array, hard decision data based on a hard read voltage and first soft decision data based on first soft read voltages obtained based on the hard read voltage and a first voltage offset, generate a first compressed sub-segment based on encoding a position of a bit having a first value into a position value for each of first soft decision sub-segments in the first soft decision data, and output first compressed data including first compressed sub-segments. The memory controller is configured to receive the first compressed data, count the number of position values in each of the first compressed sub-segments, and provide, to the memory device based on the counted number, a command to request a change of a voltage offset and a recompression operation.

原文(中文)

An example memory system includes a memory device and a memory controller. The memory device is configured to read, from a memory cell array, hard decision data based on a hard read voltage and first soft decision data based on first soft read voltages obtained based on the hard read voltage and a first voltage offset, generate a first compressed sub-segment based on encoding a position of a bit having a first value into a position value for each of first soft decision sub-segments in the first soft decision data, and output first compressed data including first compressed sub-segments. The memory controller is configured to receive the first compressed data, count the number of position values in each of the first compressed sub-segments, and provide, to the memory device based on the counted number, a command to request a change of a voltage offset and a recompression operation.