Floating Point to Fixed Point Conversion

原文（中文）

A binary logic circuit for converting a number in floating point format into a fixed point format. An inverting hardware circuit inverts bit values of an exponent. A shifter coupled to the inverting hardware circuit receives a significand input comprising a contiguous set of the most significant bits of the significand and right-shifts the significand input by a number of bits equal to the value represented by p least significant bits of the inverted exponent to generate a shifter output, wherein p is dependent on an integer width iw or a fractional width fw. A multiplexer coupled to the shifter receives an input comprising a contiguous set of bits of the shifter output, and outputs the input if the most significant bit of the exponent is equal to zero.