COMMAND REQUESTS FOR HARDWARE ACCELERATORS

原文（中文）

An apparatus comprises processing circuitry to execute instructions; and accelerator control interface circuitry to exchange control signals with at least one hardware accelerator configurable, based on instructions executed by the processing circuitry, to perform a delegated task. The accelerator control interface circuitry is responsive to an accelerator command launch instruction executed by the processing circuitry, to output a command request to a given hardware accelerator associated with command data for configuring the given hardware accelerator to perform the delegated task. When the accelerator command launch instruction is an accelerator command-with-response launch instruction, the command request comprises a command-with-response request indicating that the given hardware accelerator is to acknowledge the command data. When the accelerator command launch instruction is an accelerator command-without-response launch instruction, the command request comprises a command-without-response request indicating that the given hardware accelerator does not need to acknowledge the command data.