CNIPA.AI
返回搜索
档案

HIGH PERFORMANCE EXECUTION OF STATE SPACE MODELS ON NEURAL NETWORK ACCELERATORS

发明专利审中
5浏览
20权利要求 · 3 独立
§ Ⅰ

卷宗概要

发明人

Arnab Raha; Arghadip Das; Soumendu Kumar Ghosh; Shamik Kundu; Deepak Abraham Mathaikutty

IPC 分类

G6F 17/16G6N 3/42

CPC 分类

G6F17/16G6N3/42

State space model (SSM) neural network operations can be executed efficiently on neural network accelerators by mapping sequential aggregation operations to data-parallel hardware. For cumulative sum operations, the neural network accelerator can perform matrix-to-matrix multiplication with a lower-triangular mask to achieve the same result. For reduce sum operations, the neural network accelerator can perform matrix-to-vector multiplication with a vector mask to achieve the same result. These mappings exploit the parallelism in the neural network accelerators, reduce memory traffic, and leverage sparsity compression and compute skipping for efficiency. Additionally, activation functions can be accelerated using programmable look-up tables during the drain phase. The approach achieves significant latency and energy improvements without hardware changes, enabling high performance deployment of SSM-based models on resource-constrained neural network accelerators.

原文(中文)

State space model (SSM) neural network operations can be executed efficiently on neural network accelerators by mapping sequential aggregation operations to data-parallel hardware. For cumulative sum operations, the neural network accelerator can perform matrix-to-matrix multiplication with a lower-triangular mask to achieve the same result. For reduce sum operations, the neural network accelerator can perform matrix-to-vector multiplication with a vector mask to achieve the same result. These mappings exploit the parallelism in the neural network accelerators, reduce memory traffic, and leverage sparsity compression and compute skipping for efficiency. Additionally, activation functions can be accelerated using programmable look-up tables during the drain phase. The approach achieves significant latency and energy improvements without hardware changes, enabling high performance deployment of SSM-based models on resource-constrained neural network accelerators.