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SEMICONDUCTOR PACKAGE

发明专利审中
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20权利要求 · 3 独立
§ Ⅰ

卷宗概要

IPC 分类

H1L 23/498H1L 21/48H1L 23/

CPC 分类

H1L23/49838H1L21/4857H1L21/486H1L23/49816H1L23/49822H1L23/49894H1L24/42H1L24/48H1L24/85H1L21/4853H1L2224/5007H1L2224/5009H1L2224/48229

A semiconductor device includes a substrate that includes an upper protection layer and a plurality of upper bonding pads, a semiconductor chip on the substrate, and a plurality of bonding wires connected to the semiconductor chip and the upper bonding pads. Each of the upper bonding pads includes a first conductive pattern, a second conductive pattern that covers a top surface and a sidewall of the first conductive pattern and includes a metal element the same as a metal element of the first conductive pattern, and a bonding layer on the second conductive pattern. A width at the top surface of the first conductive pattern is less than a width at a bottom surface of the first conductive pattern. The upper protection layer covers sidewalls of the second conductive pattern.

原文(中文)

A semiconductor device includes a substrate that includes an upper protection layer and a plurality of upper bonding pads, a semiconductor chip on the substrate, and a plurality of bonding wires connected to the semiconductor chip and the upper bonding pads. Each of the upper bonding pads includes a first conductive pattern, a second conductive pattern that covers a top surface and a sidewall of the first conductive pattern and includes a metal element the same as a metal element of the first conductive pattern, and a bonding layer on the second conductive pattern. A width at the top surface of the first conductive pattern is less than a width at a bottom surface of the first conductive pattern. The upper protection layer covers sidewalls of the second conductive pattern.