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PROJECTED PHASE CHANGE MEMORY DEVICE WITH LOW-CONDUCTANCE NON-VOLATILE STATES

发明专利审中
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20权利要求 · 3 独立
§ Ⅰ

卷宗概要

发明人

Ghazi Sarwat Syed; Vara Sudananda Prasad Jonnalagadda; Timothy Mathew Philip; Abu Sebastian

IPC 分类

H10N 70/20H10B 63/10H10N 70/

CPC 分类

H10N70/231H10B63/10H10N70/63H10N70/826H10N70/8413

A PCM memory structure having extended projection liner material portion to reduce conductance value in a SET state and increase power efficiency. The projection liner material layer includes bottom and vertically extending liner sidewall portions. A phase change material (PCM) layer positioned above the projection liner material layer also has vertically extended PCM sidewall portions that are shorter than the vertically extending liner sidewall portions, thereby increasing the length of the liner relative to a length of the PCM layer. In a RESET state, current flow bypasses an amorphous volume to reduce the device non-idealities yet leverage the in-plane resistivity of the liner to provide projection in the RESET states and to lower the conductance in the SET states of the device thereby reducing current and power dissipation and power consumption will be lowered when in a SET state.

原文(中文)

A PCM memory structure having extended projection liner material portion to reduce conductance value in a SET state and increase power efficiency. The projection liner material layer includes bottom and vertically extending liner sidewall portions. A phase change material (PCM) layer positioned above the projection liner material layer also has vertically extended PCM sidewall portions that are shorter than the vertically extending liner sidewall portions, thereby increasing the length of the liner relative to a length of the PCM layer. In a RESET state, current flow bypasses an amorphous volume to reduce the device non-idealities yet leverage the in-plane resistivity of the liner to provide projection in the RESET states and to lower the conductance in the SET states of the device thereby reducing current and power dissipation and power consumption will be lowered when in a SET state.