PROCESSOR, INFORMATION PROCESSING APPARATUS, AND PROCESSOR CONTROL METHOD
案件概要
発明者
Takeshi OSONOI
IPC分類
CPC分類
In a processor, a first allowable power determination circuit determines a smaller value of first request power requested by an entire plurality of calculation devices or first power limit for the entire plurality of calculation devices as a first allowable power allowable to the entire plurality of calculation devices, a second allowable power determination circuit that determines second allowable power for each calculation device based on a smaller value of second request power or second power limit for each calculation device and the first allowable power, and a transmission circuit that transmits the second allowable power to the calculation device to cause the calculation device to receive supply of the second allowable power.
原文（中国語）
In a processor, a first allowable power determination circuit determines a smaller value of first request power requested by an entire plurality of calculation devices or first power limit for the entire plurality of calculation devices as a first allowable power allowable to the entire plurality of calculation devices, a second allowable power determination circuit that determines second allowable power for each calculation device based on a smaller value of second request power or second power limit for each calculation device and the first allowable power, and a transmission circuit that transmits the second allowable power to the calculation device to cause the calculation device to receive supply of the second allowable power.
外部リソース