Apparatus and Method for Augmented Snoop Handling Dynamicity and Efficiency

原文（中国語）

An apparatus and method for improved snoop handling dynamicity and efficiency. For example, one embodiment of a processor comprises: a plurality of cores; a plurality of caches to store cachelines read from memory by the plurality of cores; cache management circuitry to manage coherency of the cachelines by performing snoops including probes and confirms, the cache management circuitry to: determine a number of outstanding probes and a number of outstanding confirms within a snoop monitoring window; and prioritize confirms over probes or prioritize probes over confirms based, at least in part, on the number of outstanding confirms relative to the number of outstanding probes.