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案件記録

DISPLAY SUBSTRATE AND DISPLAY APPARATUS

発明審査中
2閲覧数
20請求項 · 1 独立
§ Ⅰ

案件概要

発明者

Zhongliu YANG; Zhengkun LI; Haigang QING

IPC分類

G9G 3/3258

CPC分類

G9G3/3258G9G2300/408G9G2300/426G9G2300/861G9G2320/233G9G2330/23

A display substrate and a display apparatus are provided. The display substrate includes a base substrate including a display region and a peripheral region; a driving functional layer on one side of the base substrate and including pixel driving circuits in the display region and arranged in an array along a first and second directions intersecting with each other; a first conductive layer on a side of the driving functional layer away from the base substrate and including first power lines for providing a first operating voltage; a first planarization layer and a second conductive layer between the driving functional layer and the first conductive layer. The first planarization layer is between the first and second conductive layers, and the second conductive layer includes a first conductive pattern electrically connected in parallel with a corresponding first power line through a first via in the first planarization layer.

原文(中国語)

A display substrate and a display apparatus are provided. The display substrate includes a base substrate including a display region and a peripheral region; a driving functional layer on one side of the base substrate and including pixel driving circuits in the display region and arranged in an array along a first and second directions intersecting with each other; a first conductive layer on a side of the driving functional layer away from the base substrate and including first power lines for providing a first operating voltage; a first planarization layer and a second conductive layer between the driving functional layer and the first conductive layer. The first planarization layer is between the first and second conductive layers, and the second conductive layer includes a first conductive pattern electrically connected in parallel with a corresponding first power line through a first via in the first planarization layer.

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