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案件記録

MEMORY DEVICE AND OPERATING METHOD OF THE SAME

発明審査中
24請求項 · 3 独立
§ Ⅰ

案件概要

IPC分類

G11C 7/6

CPC分類

G11C7/6

A memory device includes a first driving circuit configured to supply a second voltage to a supply terminal of a first voltage when the first voltage is lower than a first threshold voltage, in response to a first enable signal; a second driving circuit configured to supply the second voltage to the supply terminal of the first voltage when the first voltage is lower than a second threshold voltage, in response to a second enable signal, the second threshold voltage having a lower voltage level than the first threshold voltage; and a sense amplification circuit coupled to the supply terminal of the first voltage.

原文(中国語)

A memory device includes a first driving circuit configured to supply a second voltage to a supply terminal of a first voltage when the first voltage is lower than a first threshold voltage, in response to a first enable signal; a second driving circuit configured to supply the second voltage to the supply terminal of the first voltage when the first voltage is lower than a second threshold voltage, in response to a second enable signal, the second threshold voltage having a lower voltage level than the first threshold voltage; and a sense amplification circuit coupled to the supply terminal of the first voltage.

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