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案件記録

REPAIRING DEFECTIVE COLUMNS OF COMPUTE-IN-MEMORY AND NEAR-MEMORY COMPUTING DEVICES

発明審査中
20請求項 · 3 独立
§ Ⅰ

案件概要

出願人

MACRONIX INTERNATIONAL CO., LTD.

発明者

Chun-Hsiung HUNG; Hsin-Yi HO

IPC分類

G11C 29/G11C 11/54

CPC分類

G11C29/702G11C11/54G11C29/789

A compute-in-memory (CIM) device is provided. The CIM device includes control circuits providing N input data elements and M redundancy input data elements, N and M being greater than zero, multiplier circuits configured to (i) multiply N input data elements by N stored data elements and (ii) provide a multiplier output, and redundancy multiplier circuits configured to (i) multiply the M redundancy input data elements by M stored redundant data elements and (ii) provide a redundancy multiplier output, wherein the control circuits provide (i) the N input data elements to the multiplier circuits and (ii) the M redundancy input data elements with a value of zero to the redundancy multiplier circuits, such that the redundancy multiplier circuits provide a redundancy multiplier output of zero, regardless of a value of the M stored redundant data elements.

原文(中国語)

A compute-in-memory (CIM) device is provided. The CIM device includes control circuits providing N input data elements and M redundancy input data elements, N and M being greater than zero, multiplier circuits configured to (i) multiply N input data elements by N stored data elements and (ii) provide a multiplier output, and redundancy multiplier circuits configured to (i) multiply the M redundancy input data elements by M stored redundant data elements and (ii) provide a redundancy multiplier output, wherein the control circuits provide (i) the N input data elements to the multiplier circuits and (ii) the M redundancy input data elements with a value of zero to the redundancy multiplier circuits, such that the redundancy multiplier circuits provide a redundancy multiplier output of zero, regardless of a value of the M stored redundant data elements.

外部リソース