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案件記録

THIN FILM TRANSISTORS HAVING COMBINED VIA AND GATE ELECTRODE

発明審査中
5閲覧数
20請求項 · 3 独立
§ Ⅰ

案件概要

発明者

Moshe DOLEJSI; Abhishek Anil SHARMA; Van H. LE; Christopher J. WIEGAND; Gregory J. GEORGE; Vladimir NIKITIN; Travis W. LAJOIE; Jannatul Fedous MOUSUMI; Suraj MATHEW

IPC分類

H1L 23/535H1L 21/768H1L 29/786

CPC分類

H1L23/535H1L21/76805H1L21/7684H1L21/76843H1L21/76895H10D30/6731H10D30/6745H10D30/6755H10D30/6757

Thin film transistors are described. An integrated circuit structure includes a first dielectric layer having a conductive interconnect therein. A second dielectric layer is above the first dielectric layer. A conductive structure is in the second dielectric layer and in contact with the conductive interconnect. The conductive structure includes a lower conductive via portion continuous with an upper gate electrode portion that extends above and onto an uppermost surface of the second dielectric layer. A gate dielectric layer is on the upper gate electrode portion of the conductive structure. A channel material layer is on the gate dielectric layer. Source or drain contacts are on the channel material layer.

原文(中国語)

Thin film transistors are described. An integrated circuit structure includes a first dielectric layer having a conductive interconnect therein. A second dielectric layer is above the first dielectric layer. A conductive structure is in the second dielectric layer and in contact with the conductive interconnect. The conductive structure includes a lower conductive via portion continuous with an upper gate electrode portion that extends above and onto an uppermost surface of the second dielectric layer. A gate dielectric layer is on the upper gate electrode portion of the conductive structure. A channel material layer is on the gate dielectric layer. Source or drain contacts are on the channel material layer.

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