検索に戻る
案件記録

THIN FILM TRANSISTORS WITH ADDITIVE PILLAR CAPACITORS

発明審査中
7閲覧数
20請求項 · 3 独立
§ Ⅰ

案件概要

発明者

Moshe DOLEJSI; Anbusathaiah VARATHARAJAN; Abhishek Anil SHARMA; Travis W. LAJOIE; Abhishek KOTHARI; Shardul WADEKAR; Yu-Wen HUANG; Mengcheng LU

IPC分類

H10B 12/

CPC分類

H10B12/315H10B12/33

Thin film transistors are described. An integrated circuit structure includes a thin film transistor having a planar or non-planar channel material layer. A conductive via or line is coupled to the thin film transistor. A capacitor structure is coupled to the conductive via or line. The capacitor structure includes a first electrode layer along sidewalls and a bottom of a dielectric pillar, a capacitor dielectric layer along side portions of the first electrode layer and on a top of the dielectric pillar, and a second electrode layer along side portions and over a top portion of the capacitor dielectric layer.

原文(中国語)

Thin film transistors are described. An integrated circuit structure includes a thin film transistor having a planar or non-planar channel material layer. A conductive via or line is coupled to the thin film transistor. A capacitor structure is coupled to the conductive via or line. The capacitor structure includes a first electrode layer along sidewalls and a bottom of a dielectric pillar, a capacitor dielectric layer along side portions of the first electrode layer and on a top of the dielectric pillar, and a second electrode layer along side portions and over a top portion of the capacitor dielectric layer.

外部リソース