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案件記録

SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF

発明審査中
61閲覧数
14請求項 · 2 独立
§ Ⅰ

案件概要

発明者

Kuen Wei Sung; Hsin Tai; Yi-Hsuan Pai

IPC分類

H10B 12/H1L 21/762

CPC分類

H10B12/50H1L21/76224H10B12/3H10B12/9H10B12/488

A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a substrate, a first dielectric layer, a storage node contact, a first dummy contact and a second dummy contact. The substrate has a memory device region and a peripheral region. The first dielectric layer is disposed on the substrate. The storage node contact is disposed in the first dielectric layer in the memory device region. The first dummy contact is disposed in the first dielectric layer in the memory device region and is adjacent to a boundary between the memory device region and the peripheral region. The second dummy contact is disposed in the first dielectric layer in the memory device region and is located between the first dummy contact and the storage node contact. The second dummy contact includes a second dielectric layer and a conductive layer located on the second dielectric layer.

原文(中国語)

A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a substrate, a first dielectric layer, a storage node contact, a first dummy contact and a second dummy contact. The substrate has a memory device region and a peripheral region. The first dielectric layer is disposed on the substrate. The storage node contact is disposed in the first dielectric layer in the memory device region. The first dummy contact is disposed in the first dielectric layer in the memory device region and is adjacent to a boundary between the memory device region and the peripheral region. The second dummy contact is disposed in the first dielectric layer in the memory device region and is located between the first dummy contact and the storage node contact. The second dummy contact includes a second dielectric layer and a conductive layer located on the second dielectric layer.

外部リソース