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案件記録

SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREFOR

発明審査中
6閲覧数
15請求項 · 2 独立
§ Ⅰ

案件概要

発明者

Yuefeng CAO; Chiyuan MA; Dejian TANG; Kun WANG; Shiyuan JIA

IPC分類

H10D 1/68H10D 1/

CPC分類

H10D1/716H10D1/45

Disclosed are a semiconductor structure and a manufacturing method therefor. The manufacturing method includes the following: a stack is formed on a base; multiple bottom electrodes are formed in the stack, each of the bottom electrodes including a body portion in the stack and an extension portion protruding from the stack; the extension portion is etched, so that a horizontal width of the extension portion is less than a horizontal width of the body portion; a dielectric layer and a conductive film layer are successively formed on the stack, the extension portion being covered by the dielectric layer and the conductive film layer; the conductive film layer is etched to expose the stack and form multiple conductive support layers; the stack is etched to expose the body portion; a dielectric layer is formed on the body portion; and a top electrode is formed on the dielectric layer.

原文(中国語)

Disclosed are a semiconductor structure and a manufacturing method therefor. The manufacturing method includes the following: a stack is formed on a base; multiple bottom electrodes are formed in the stack, each of the bottom electrodes including a body portion in the stack and an extension portion protruding from the stack; the extension portion is etched, so that a horizontal width of the extension portion is less than a horizontal width of the body portion; a dielectric layer and a conductive film layer are successively formed on the stack, the extension portion being covered by the dielectric layer and the conductive film layer; the conductive film layer is etched to expose the stack and form multiple conductive support layers; the stack is etched to expose the body portion; a dielectric layer is formed on the body portion; and a top electrode is formed on the dielectric layer.

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