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案件記録

THIN FILM TRANSISTORS HAVING MULTI-LAYER CONTACT METALLIZATION

発明審査中
2閲覧数
20請求項 · 3 独立
§ Ⅰ

案件概要

発明者

Shailesh Kumar MADISETTI; Suraj MATHEW; Huiying LIU; Xiaoye QIN; Vladimir NIKITIN; Moshe DOLEJSI; Jannatul Ferdous MOUSUMI; Gregory J. GEORGE; Abhishek Anil SHARMA; Van H. LE; Travis W. LAJOIE

IPC分類

H1L 29/417H1L 27/88H1L 29/786

CPC分類

H10D30/6729H10D30/6757H10D84/83

Thin film transistors are described. An integrated circuit structure includes a gate electrode. A gate dielectric layer is on the gate electrode. A channel material layer is on the gate dielectric layer. A dielectric layer is over the channel material layer. Source or drain contacts are on the channel material layer. Each of the source or drain contacts includes a semiconductor material layer, a conductive liner on and within the semiconductor material layer, and a conductive fill on the conductive liner, where one, two or all three of the semiconductor material layer, the conductive liner, or the conductive fill has an uppermost surface at a same level as an uppermost surface of the dielectric layer.

原文(中国語)

Thin film transistors are described. An integrated circuit structure includes a gate electrode. A gate dielectric layer is on the gate electrode. A channel material layer is on the gate dielectric layer. A dielectric layer is over the channel material layer. Source or drain contacts are on the channel material layer. Each of the source or drain contacts includes a semiconductor material layer, a conductive liner on and within the semiconductor material layer, and a conductive fill on the conductive liner, where one, two or all three of the semiconductor material layer, the conductive liner, or the conductive fill has an uppermost surface at a same level as an uppermost surface of the dielectric layer.

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