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案件記録

FABRICATION OF TRENCH TRANSISTOR WITH ESD IN TRENCH

発明審査中
20請求項 · 2 独立
§ Ⅰ

案件概要

発明者

Xueqing Liu; Qinhai Jin; Sik Lui; Xiaobin Wang; Wenwen Li; Lingpeng Guan; Madhur Bobde; Jian Wang; Sekar Ramamoorthy

IPC分類

H1L 29/40H1L 21/2H1L 21/304H1L 21/768H1L 27/2H1L 29/423

CPC分類

H10D64/118H1L21/254H1L21/304H1L21/76831H10D64/513H10D89/611

A method of fabrication and composition of matter, comprising a semiconductor substrate including ions of a first conductivity type wherein the ions of the first conductivity are opposite ions of a second conductivity type, An Electrostatic Discharge Protection (ESD) trench formed in the semiconductor substrate with a lower insulation layer formed over a surface of the ESD trench in the semiconductor substrate. A nitride layer is formed over the lower insulation layer in the ESD trench, and an upper insulation is formed on the nitride layer in the ESD trench. An ESD semiconductor layer is formed on the upper insulation layer.

原文(中国語)

A method of fabrication and composition of matter, comprising a semiconductor substrate including ions of a first conductivity type wherein the ions of the first conductivity are opposite ions of a second conductivity type, An Electrostatic Discharge Protection (ESD) trench formed in the semiconductor substrate with a lower insulation layer formed over a surface of the ESD trench in the semiconductor substrate. A nitride layer is formed over the lower insulation layer in the ESD trench, and an upper insulation is formed on the nitride layer in the ESD trench. An ESD semiconductor layer is formed on the upper insulation layer.

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