FABRICATION OF TRENCH TRANSISTOR WITH ESD IN TRENCH
案件概要
出願人
Alpha and Omega Semiconductor International LP
発明者
Xueqing Liu; Qinhai Jin; Sik Lui; Xiaobin Wang; Wenwen Li; Lingpeng Guan; Madhur Bobde; Jian Wang; Sekar Ramamoorthy
IPC分類
CPC分類
A method of fabrication and composition of matter, comprising a semiconductor substrate including ions of a first conductivity type wherein the ions of the first conductivity are opposite ions of a second conductivity type, An Electrostatic Discharge Protection (ESD) trench formed in the semiconductor substrate with a lower insulation layer formed over a surface of the ESD trench in the semiconductor substrate. A nitride layer is formed over the lower insulation layer in the ESD trench, and an upper insulation is formed on the nitride layer in the ESD trench. An ESD semiconductor layer is formed on the upper insulation layer.
原文(中国語)
A method of fabrication and composition of matter, comprising a semiconductor substrate including ions of a first conductivity type wherein the ions of the first conductivity are opposite ions of a second conductivity type, An Electrostatic Discharge Protection (ESD) trench formed in the semiconductor substrate with a lower insulation layer formed over a surface of the ESD trench in the semiconductor substrate. A nitride layer is formed over the lower insulation layer in the ESD trench, and an upper insulation is formed on the nitride layer in the ESD trench. An ESD semiconductor layer is formed on the upper insulation layer.
外部リソース