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案件記録

PIXEL WITH VERTICAL TRANSFER GATE

発明審査中
1閲覧数
20請求項 · 2 独立
§ Ⅰ

案件概要

発明者

Satoshi NAKAYAMA; Nagataka TANAKA

IPC分類

H10F 39/

CPC分類

H10F39/80373H10F39/807H10F39/809

The image sensor comprises a semiconductor layer and a vertical gate structure. The semiconductor layer has a first side and a second side opposite to the first side. The semiconductor layer includes a first photodiode and a second photodiode adjacent to the first photodiode. The vertical gate structure is disposed between the first photodiode and the second photodiode. The vertical gate structure includes a planar portion and a vertical gate portion. The planar portion is disposed proximate to the first side. The vertical gate portion is extended from the planar portion a depth into the semiconductor layer.

原文(中国語)

The image sensor comprises a semiconductor layer and a vertical gate structure. The semiconductor layer has a first side and a second side opposite to the first side. The semiconductor layer includes a first photodiode and a second photodiode adjacent to the first photodiode. The vertical gate structure is disposed between the first photodiode and the second photodiode. The vertical gate structure includes a planar portion and a vertical gate portion. The planar portion is disposed proximate to the first side. The vertical gate portion is extended from the planar portion a depth into the semiconductor layer.

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