MEMORY CELL
案件概要
出願人
STMicroelectronics International N.V.
発明者
Valentin BACQUIE; Sarah RUBECK
IPC分類
CPC分類
An electronic device includes a plurality of memory cells organized in an array, forming rows and columns. Each memory cell includes a stack of a resistive heating element, of a layer made of a phase-change material, of an upper electrode, and of a masking layer. The layer made of the phase-change material, the upper electrode, and the masking layer are common to the memory cells of a same row and are covered by an encapsulation layer. The encapsulation layer covers an upper surface of the masking layer and side flanks of the masking layer, of the upper electrode, and of the layer made of the phase-change material. The masking layer has a thickness lower than 15 nm.
原文(中国語)
An electronic device includes a plurality of memory cells organized in an array, forming rows and columns. Each memory cell includes a stack of a resistive heating element, of a layer made of a phase-change material, of an upper electrode, and of a masking layer. The layer made of the phase-change material, the upper electrode, and the masking layer are common to the memory cells of a same row and are covered by an encapsulation layer. The encapsulation layer covers an upper surface of the masking layer and side flanks of the masking layer, of the upper electrode, and of the layer made of the phase-change material. The masking layer has a thickness lower than 15 nm.
外部リソース