Shifting register and driving method thereof, gate driving circuit and display device
データ提供元:EPO OPS
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案件概要
出願番号
CN202410354593
発明者
CHEN WENBO; YU ZIYANG; JIANG ZHILIANG; WU JIANPENG; WANG MENGQI; HU MING; QIU HAIJUN; HAN HONGDA
出願日
Mar 26, 2024
公開日
Aug 20, 2024
パテントファミリーID
92278779
IPC分類
CPC分類
The invention discloses a shift register and a driving method thereof, a grid driving circuit and a display device, and the shift register comprises a node control sub-circuit which is configured to provide a signal for a driving output sub-circuit under the control of signals of a cascade output sub-circuit, a first power supply end, a second power supply end and a first control input signal end; the driving output sub-circuit is configured to provide a signal of a first power supply end or a second control input signal end to a driving output signal end under the control of signals of the cascade output sub-circuit and the node control sub-circuit; the first control input signal end comprises a second clock signal end, the second control input signal end comprises a masking signal end, or the first control input signal end comprises a second clock signal end and a masking signal end, and the second control input signal end comprises a second clock signal end.
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