Array substrate, display panel and electronic equipment
データ提供元:EPO OPS
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案件概要
出願番号
CN20228005272
発明者
LI XIAOYING; YAO ZHIXIAO; CHEN WEITAO; MA YU; YAN YAN; CUI XIAOPENG; ZHENG XIAOYI; WANG XIAO; MA ZHIQIANG; LI BO
出願日
Dec 26, 2022
公開日
Aug 27, 2024
パテントファミリーID
91715938
IPC分類
CPC分類
The invention relates to an array substrate, a display panel and electronic equipment. The array substrate comprises a plurality of sub-pixel areas, a grid line layer and a common electrode layer. Each sub-pixel region is provided with two sub-pixel units which are arranged in the same row and two thin film transistors which are respectively connected with the two sub-pixel units; the grid line layer is provided with a grid line and a grid electrode; the control electrodes of the two thin film transistors of each sub-pixel area are connected to the two grid lines located on the two sides of the sub-pixel area through the corresponding grid electrodes respectively, and one of the two sub-pixel units of at least part of the sub-pixel area is connected with the corresponding thin film transistor through a long first connecting part. The other thin film transistor is connected with the corresponding thin film transistor through a shorter second connecting part; the extending directions of the first connecting parts and the grid lines connected with the corresponding thin film transistors are consistent; the common electrode layer comprises an electrode wire body and a shielding part, and the shielding part is located above the first connecting part and/or located above the grid line connected with the thin film transistor corresponding to the first connecting part.
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