Shift register circuit and control method thereof, gate drive circuit and display device
データ提供元:EPO OPS
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案件概要
出願番号
CN202410696058
発明者
FENG JINGYI; ZHANG ZHENHUA; YUAN CHANGLONG; ZHU LI; CAO XILEI; SHEN WULIN
出願日
May 31, 2024
公開日
Aug 30, 2024
パテントファミリーID
92477716
IPC分類
CPC分類
The invention provides a shift register circuit and a control method thereof, a gate drive circuit and a display device.The shift register circuit comprises an input sub-circuit electrically connected to an input end, a pull-up node, a first clock signal end and a second clock signal end, the pull-up sub-circuit is configured to electrically connect an input end with a pull-up node based on a signal of a first clock signal end and electrically connect a second clock signal end with the pull-up node based on a signal of the second clock signal end and the pull-up node, and the pull-up sub-circuit outputs a signal of the second clock signal end to an output end based on the potential of the pull-up node. The first pull-down control sub-circuit controls the potential of the first pull-down node based on the signals of the first pull-down control end and the pull-up node, and the first pull-down sub-circuit electrically connects the first power supply signal end with the output end based on the signals of the first pull-down node. According to the embodiment provided by the invention, the N-type shift register circuit is realized, and the stability and the reliability of the gate driving signal are improved.
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