Storage array, electronic equipment, memory and manufacturing method of storage array
データ提供元:EPO OPS
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案件概要
出願番号
CN202310284767
発明者
LYU HANGBING; WANG CHAO; XU YANNAN; XU JUNHAO
出願日
Mar 15, 2023
公開日
Sep 20, 2024
パテントファミリーID
92723427
IPC分類
CPC分類
The embodiment of the invention provides a storage array, electronic equipment, a memory and a manufacturing method of the storage array, which are used for solving the technical problem of low storage density of the memory. The memory array includes a substrate and transistors. The transistor includes a first channel layer, a first insulating layer, a first conductive layer, a first polarization layer, and a first gate. The first channel layer and the first conductive layer are respectively arranged on two opposite sides of the first insulating layer along the direction parallel to the substrate; the first polarization layer is arranged on one side, deviating from the first insulating layer, of the first conductive layer; the first grid is arranged on the side, away from the first conductive layer, of the first polarization layer. The first source line and the first bit line are arranged on the side, away from the first insulating layer, of the first channel layer. According to the storage array provided by the embodiment of the invention, the film layers are horizontally stacked, the storage density is high, a larger device operation window is provided, multi-valued storage can be realized, crosstalk is solved, and the adopted AND gate (AND) architecture process is high in compatibility and low in difficulty.
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