CNIPA.AI
검색으로 돌아가기
기록

PROCESSOR, INFORMATION PROCESSING APPARATUS, AND PROCESSOR CONTROL METHOD

발명심사 중
2조회수
8청구항 · 3 독립항
§ Ⅰ

개요

IPC 분류

G6F 1/26

CPC 분류

G6F1/26

In a processor, a first allowable power determination circuit determines a smaller value of first request power requested by an entire plurality of calculation devices or first power limit for the entire plurality of calculation devices as a first allowable power allowable to the entire plurality of calculation devices, a second allowable power determination circuit that determines second allowable power for each calculation device based on a smaller value of second request power or second power limit for each calculation device and the first allowable power, and a transmission circuit that transmits the second allowable power to the calculation device to cause the calculation device to receive supply of the second allowable power.

원문 (중국어)

In a processor, a first allowable power determination circuit determines a smaller value of first request power requested by an entire plurality of calculation devices or first power limit for the entire plurality of calculation devices as a first allowable power allowable to the entire plurality of calculation devices, a second allowable power determination circuit that determines second allowable power for each calculation device based on a smaller value of second request power or second power limit for each calculation device and the first allowable power, and a transmission circuit that transmits the second allowable power to the calculation device to cause the calculation device to receive supply of the second allowable power.