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기록

MEMORY INTERFACE CIRCUITS INCLUDING ENCRYPT/DECRYPT CIRCUITS TO RE-ENCRYPT ENCRYPTED DATA BLOCKS IN A MEMORY CIRCUIT AND RELATED METHODS

발명심사 중
1조회수
20청구항 · 3 독립항
§ Ⅰ

개요

발명자

Jitendra LULLA; Raymond Marcelino Manese LIM; Wael NOUREDDINE; Eric SWARTZENDRUBER; Charles Edward GRAY; Dilipkumar ADIKESAVAN

IPC 분류

G6F 3/6

CPC 분류

G6F3/622G6F3/655G6F3/679

An exemplary memory interface circuit disclosed herein re-encrypts data in an encrypted data block in a memory circuit to further protect the data. In particular, the memory interface circuit reads an encrypted data block from the memory circuit and decrypts the encrypted data block using a first key that was previously used to encrypt the block of data. Then, the memory interface circuit encrypts the data again using a second key before storing the re-encrypted data back into the memory circuit. In some examples, the memory interface circuit includes a re-encryption circuit that includes secure configuration registers to control occasional re-encryption of the encrypted data in an effort to evade detection of the encryption key. In some examples, the time between re-encryptions may be adjusted in response to a frequency of memory accesses to the memory circuit.

원문 (중국어)

An exemplary memory interface circuit disclosed herein re-encrypts data in an encrypted data block in a memory circuit to further protect the data. In particular, the memory interface circuit reads an encrypted data block from the memory circuit and decrypts the encrypted data block using a first key that was previously used to encrypt the block of data. Then, the memory interface circuit encrypts the data again using a second key before storing the re-encrypted data back into the memory circuit. In some examples, the memory interface circuit includes a re-encryption circuit that includes secure configuration registers to control occasional re-encryption of the encrypted data in an effort to evade detection of the encryption key. In some examples, the time between re-encryptions may be adjusted in response to a frequency of memory accesses to the memory circuit.