PRESCIENT COMPUTING
개요
발명자
Christopher Wilkerson; Raghavan Kumar; Adish Vartak; Christopher J. Hughes; Sanu K. Mathew
IPC 분류
CPC 분류
Techniques for static instruction decoupling for data movement and computer are described. In some examples, hardware support at least includes a plurality of instruction queues to store instructions, wherein each instruction queue of the plurality of instruction queues is dedicated to a separate thread; a local memory to store instructions and/or data for a first thread; a scratchpad memory, coupled to the local memory, to store instructions and/or data for a second thread; and execution resources, coupled to the scratchpad memory, to execute one or more mathematic and/or logical instructions for a third thread.
원문 (중국어)
Techniques for static instruction decoupling for data movement and computer are described. In some examples, hardware support at least includes a plurality of instruction queues to store instructions, wherein each instruction queue of the plurality of instruction queues is dedicated to a separate thread; a local memory to store instructions and/or data for a first thread; a scratchpad memory, coupled to the local memory, to store instructions and/or data for a second thread; and execution resources, coupled to the scratchpad memory, to execute one or more mathematic and/or logical instructions for a third thread.