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기록

Memory Bit Correction Via Bit Addressing

발명심사 중
4조회수
20청구항 · 3 독립항
§ Ⅰ

개요

발명자

Giuseppe Rizzi; Christopher White; Daniel R. Burggraf

IPC 분류

G6F 12/2

CPC 분류

G6F12/246

Systems and methods to address and correct individual bits within a data word in memory are disclosed. A data word may correspond to a set of additional bits. Logic in a memory controller may be configured to write a code into the additional bits in the event that a bit within the data word is slow to erase or slow to program. A subsequent read operation may then read the data word as well as the additional bits and correct the particular bit in accordance with the code stored to the additional bits.

원문 (중국어)

Systems and methods to address and correct individual bits within a data word in memory are disclosed. A data word may correspond to a set of additional bits. Logic in a memory controller may be configured to write a code into the additional bits in the event that a bit within the data word is slow to erase or slow to program. A subsequent read operation may then read the data word as well as the additional bits and correct the particular bit in accordance with the code stored to the additional bits.