DISPATCH FOR A CONFIGURABLE DATA-FLOW COMPUTE ARRAY AND DATA-PARALLEL COMPUTE UNITS

원문 (중국어)

A command processor dispatches instructions to a processing unit and a systolic array. The command processor receives a packet including instructions for execution on the systolic array. In response to determining that reconfiguration of the systolic array is to be performed in order to process the instructions, the command processor determines whether a previously dispatched packet is executing on the systolic array. The command processor dispatches reconfiguration instructions for execution concurrently with the processing unit executing the previously dispatched packet in response to determining that there is no conflict between the reconfiguration instructions and a current configuration used by the previously dispatched packet. If a conflict exists between the reconfiguration instructions and the current reconfiguration, the command processor waits for an acknowledgment indicating that execution of the previously dispatched packet is complete and dispatches the reconfiguration instructions.