Event-Based Power Analysis with Integrated Timing Characterization and Logic Simulation

원문 (중국어)

A method for providing power analysis of a circuit comprises estimating output power during a time interval for a gate of the circuit based on an input event; and including the estimated output power of the gate in the power analysis of the circuit. In some implementations, estimating output power includes considering, for the gate, an “output timing reject region” of the input event in which a pulse width at the input is between two thresholds, the thresholds being selected such that the input event does not propagate to an output of the gate. Nevertheless, the input event contributes partially to the estimated output of the gate. In some implementations, estimating output power includes implementing a live gate model using gate datasheet information stored by the gate.