Pixel Circuit and Driving Method Thereof, Display Panel, and Display Device
개요
출원인
CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.; BOE TECHNOLOGY GROUP CO., LTD.
발명자
Ming Hu; Wenhui Gao; Yonglin Guo; Ziyang Yu; Tiaomei Zhang; Miao Wang; Quanyong Gu; Shilong Wang; Jingwen Zhang; Jian Li; Jianpeng Wu; Tianyi Cheng; Zhiliang Jiang; Gukhwan Song; Hai Zheng; Haigang Qing; Xiangdan Dong; Yi Zhang; Rui Wang; Taofeng Xie; Haijun Qiu
IPC 분류
CPC 분류
A pixel circuit includes a driving sub-circuit, a compensation sub-circuit, a reset sub-circuit and a storage sub-circuit. The driving sub-circuit is configured to control a circuit branch between a second node and a third node to be closed and opened under control of a voltage of a first node. The compensation sub-circuit is configured to control a circuit branch between the first node and the third node to be closed and opened in response to a first scanning signal received at a first scanning signal terminal. the reset sub-circuit is configured to transmit a first initialization signal received at a first initialization signal terminal to the first node in response to a reset signal received at a reset signal terminal. The storage sub-circuit is configured to store voltages of the first node and the second node.
원문 (중국어)
A pixel circuit includes a driving sub-circuit, a compensation sub-circuit, a reset sub-circuit and a storage sub-circuit. The driving sub-circuit is configured to control a circuit branch between a second node and a third node to be closed and opened under control of a voltage of a first node. The compensation sub-circuit is configured to control a circuit branch between the first node and the third node to be closed and opened in response to a first scanning signal received at a first scanning signal terminal. the reset sub-circuit is configured to transmit a first initialization signal received at a first initialization signal terminal to the first node in response to a reset signal received at a reset signal terminal. The storage sub-circuit is configured to store voltages of the first node and the second node.