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기록

MEMORY DEVICE AND OPERATING METHOD OF THE SAME

발명심사 중
2조회수
24청구항 · 3 독립항
§ Ⅰ

개요

IPC 분류

G11C 7/6

CPC 분류

G11C7/6

A memory device includes a first driving circuit configured to supply a second voltage to a supply terminal of a first voltage when the first voltage is lower than a first threshold voltage, in response to a first enable signal; a second driving circuit configured to supply the second voltage to the supply terminal of the first voltage when the first voltage is lower than a second threshold voltage, in response to a second enable signal, the second threshold voltage having a lower voltage level than the first threshold voltage; and a sense amplification circuit coupled to the supply terminal of the first voltage.

원문 (중국어)

A memory device includes a first driving circuit configured to supply a second voltage to a supply terminal of a first voltage when the first voltage is lower than a first threshold voltage, in response to a first enable signal; a second driving circuit configured to supply the second voltage to the supply terminal of the first voltage when the first voltage is lower than a second threshold voltage, in response to a second enable signal, the second threshold voltage having a lower voltage level than the first threshold voltage; and a sense amplification circuit coupled to the supply terminal of the first voltage.