DRIVER CIRCUITRY FOR HIGH-DENSITY MEMORY BANKS

원문 (중국어)

This disclosure is directed to column driver circuitry of a memory device. A memory bank of the memory device may include multiple memory cells arranged along multiple column select lines and row select lines. The column driver circuitry may include column drivers coupled to the column select lines. A column driver may generate a column select signal with multiple voltage steps for accessing a target memory cell coupled to a respective column select line. The column decoder may include circuitry to adjust a voltage level and/or duration of each voltage step of the column select signal to provide a desired voltage level to a target memory cell based on a disposition of the target memory cell along a column select line. For example, the column decoder may output a higher voltage level followed by a lower voltage level to access the target memory cell. The higher voltage level and the lower voltage level may be above a threshold voltage level for accessing the target memory cell.