HIGH SPEED UNLIMITED ENDURANCE NON-VOLATILE RAM INCLUDING SPIN-TRANSFER TORQUE MAGNETIC TUNNEL JUNCTION (STT-MTJ) STRUCTURES
개요
발명자
Adrian ONG; Tim LAO
IPC 분류
CPC 분류
A non-volatile static random-access memory (NVSRAM) device includes at least one array of NVSRAM cells. Each NVSRAM cell includes an SRAM unit and an MRAM unit. The SRAM unit includes at least six transistors, and the MRAM unit includes at least two-transistors and two magnetic tunnel junction (MTJ) structures. The SRAM units are accessed during normal read/write operations to allows for fast access to the NVSRAM cells with unlimited endurance and without read/write error rate issues. Hidden MRAM write operations in NVSRAM cells that are not accessed for normal read/write operations may be activated manually or automatically to back up the data stored in the corresponding SRAM units. When the NVSRAM device loses power, data stored in the SRAM units are lost, while the data backed-up in corresponding MRAM units are retained. When power is restored, an automatic data restore write cycle is started, during which the SRAM units recover their data from their corresponding MRAM units.
원문 (중국어)
A non-volatile static random-access memory (NVSRAM) device includes at least one array of NVSRAM cells. Each NVSRAM cell includes an SRAM unit and an MRAM unit. The SRAM unit includes at least six transistors, and the MRAM unit includes at least two-transistors and two magnetic tunnel junction (MTJ) structures. The SRAM units are accessed during normal read/write operations to allows for fast access to the NVSRAM cells with unlimited endurance and without read/write error rate issues. Hidden MRAM write operations in NVSRAM cells that are not accessed for normal read/write operations may be activated manually or automatically to back up the data stored in the corresponding SRAM units. When the NVSRAM device loses power, data stored in the SRAM units are lost, while the data backed-up in corresponding MRAM units are retained. When power is restored, an automatic data restore write cycle is started, during which the SRAM units recover their data from their corresponding MRAM units.