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기록

EXECUTION OF MULTIPLE PROGRAMMING OPERATIONS USING CACHE REGISTER RELEASE IN A MEMORY SUB-SYSTEM

발명심사 중
20청구항 · 3 독립항
§ Ⅰ

개요

발명자

Walter Di Francesco; Violante Moschiano; Umberto Siciliani

IPC 분류

G11C 16/10G6F 12/802G11C 11/56G11C 16/4

CPC 분류

G11C16/10G6F12/802G11C16/483G6F2212/60G6F2212/72G11C11/56

Control logic in a memory device initiates a first programming operation to program a set of memory cells of the memory device to a target programming level of a set of programming levels. A programming status associated with the first programming operation is determined. In response to determining the programming status satisfies a condition, a first set of data associated with the first programming operation is caused to be released from a cache register prior to completion of the first programming operation. A second set of data associated with a second programming operation is caused to be stored in the cache register.

원문 (중국어)

Control logic in a memory device initiates a first programming operation to program a set of memory cells of the memory device to a target programming level of a set of programming levels. A programming status associated with the first programming operation is determined. In response to determining the programming status satisfies a condition, a first set of data associated with the first programming operation is caused to be released from a cache register prior to completion of the first programming operation. A second set of data associated with a second programming operation is caused to be stored in the cache register.