REPAIRING DEFECTIVE COLUMNS OF COMPUTE-IN-MEMORY AND NEAR-MEMORY COMPUTING DEVICES
개요
발명자
Chun-Hsiung HUNG; Hsin-Yi HO
IPC 분류
CPC 분류
A compute-in-memory (CIM) device is provided. The CIM device includes control circuits providing N input data elements and M redundancy input data elements, N and M being greater than zero, multiplier circuits configured to (i) multiply N input data elements by N stored data elements and (ii) provide a multiplier output, and redundancy multiplier circuits configured to (i) multiply the M redundancy input data elements by M stored redundant data elements and (ii) provide a redundancy multiplier output, wherein the control circuits provide (i) the N input data elements to the multiplier circuits and (ii) the M redundancy input data elements with a value of zero to the redundancy multiplier circuits, such that the redundancy multiplier circuits provide a redundancy multiplier output of zero, regardless of a value of the M stored redundant data elements.
원문 (중국어)
A compute-in-memory (CIM) device is provided. The CIM device includes control circuits providing N input data elements and M redundancy input data elements, N and M being greater than zero, multiplier circuits configured to (i) multiply N input data elements by N stored data elements and (ii) provide a multiplier output, and redundancy multiplier circuits configured to (i) multiply the M redundancy input data elements by M stored redundant data elements and (ii) provide a redundancy multiplier output, wherein the control circuits provide (i) the N input data elements to the multiplier circuits and (ii) the M redundancy input data elements with a value of zero to the redundancy multiplier circuits, such that the redundancy multiplier circuits provide a redundancy multiplier output of zero, regardless of a value of the M stored redundant data elements.