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기록

SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF

발명심사 중
1조회수
20청구항 · 3 독립항
§ Ⅰ

개요

발명자

Kai-Chieh CHANG; Che-Chang HSU; Kai-Fa HO; Li-Jui CHEN

IPC 분류

H1L 21/677B65G 47/90

CPC 분류

H1L21/67736B65G47/90H1L21/67724H1L21/6773H1L21/67733

A method includes retrieving a first front opening unified pod (FOUP) from a FOUP stocker utilizing an interface module equipped with a transfer module; transporting the retrieved first FOUP via the transfer module across a first path within the interface module to align the first FOUP with an available first load port of a process tool; loading the first FOUP on the first load port; delivering wafers from the first FOUP to the process tool via the first load port to initiate a wafer processing operation using the wafers.

원문 (중국어)

A method includes retrieving a first front opening unified pod (FOUP) from a FOUP stocker utilizing an interface module equipped with a transfer module; transporting the retrieved first FOUP via the transfer module across a first path within the interface module to align the first FOUP with an available first load port of a process tool; loading the first FOUP on the first load port; delivering wafers from the first FOUP to the process tool via the first load port to initiate a wafer processing operation using the wafers.