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기록

DUMMY COMPONENTS IN INTEGRATED CIRCUITS

발명심사 중
20청구항 · 2 독립항
§ Ⅰ

개요

발명자

James Robert Todd; Umamaheswari Aghoram; Scott A. Johannesmeyer; Mona Eissa; Nikhil Rangaraju; Maja Imamovic

IPC 분류

H1L 21/762H1L 21/763H1L 21/8234H1L 27/88H1L 29/78

CPC 분류

H1L21/76205H1L21/76224H1L21/763H10D84/151H10D84/38H10D84/83H10D30/65

Described examples include an integrated circuit having a substrate. The integrated circuit also has at least one dummy cell on the substrate, the dummy cell having at least a first component having an edge in a first layer of components on the substrate and at least a second component in a second layer of components, the second layer of components on the first layer of components and the substrate, wherein no part of the second component is proximate to the edge of the first component. The integrated circuit also has an insulating layer on the first layer of components and the second layer of components, the insulating layer having a first surface opposite to a second surface of the insulating layer on the first layer of components and the second layer of components, wherein the first surface is planarized and a patterned conductor layer on the first surface.

원문 (중국어)

Described examples include an integrated circuit having a substrate. The integrated circuit also has at least one dummy cell on the substrate, the dummy cell having at least a first component having an edge in a first layer of components on the substrate and at least a second component in a second layer of components, the second layer of components on the first layer of components and the substrate, wherein no part of the second component is proximate to the edge of the first component. The integrated circuit also has an insulating layer on the first layer of components and the second layer of components, the insulating layer having a first surface opposite to a second surface of the insulating layer on the first layer of components and the second layer of components, wherein the first surface is planarized and a patterned conductor layer on the first surface.