BACKSIDE ETCH PROCESSES FOR ULTRA UNIFORMITY OF FRONT-END STRUCTURES
개요
발명자
Feng Zhang; Guowei Xu; Tao Chu; Chun Wing Yeung; Kan Zhang; Anand Murthy; Ting-Hsiang Hung; Robin Chao; Yang Zhang; Paul Packan; Yanbin Luo; Chung-Hsun Lin; Chia-Ching Lin; Minwoo Jang
IPC 분류
CPC 분류
Isolation structures between transistors in integrated circuit (IC) devices. An IC device includes transistors coupled to an interconnect network, and between the transistors a dielectric structure with a wider width away from the interconnect network and a narrower width nearer the interconnect network. Dielectric structures with wider back-side widths may separate gate electrodes and/or source and drain contacts of the transistors. The dielectric structures may be formed by etching an opening between metallization structures of the transistors from a back side of the device substrate and by depositing liner and fill dielectrics over the back-side opening.
원문 (중국어)
Isolation structures between transistors in integrated circuit (IC) devices. An IC device includes transistors coupled to an interconnect network, and between the transistors a dielectric structure with a wider width away from the interconnect network and a narrower width nearer the interconnect network. Dielectric structures with wider back-side widths may separate gate electrodes and/or source and drain contacts of the transistors. The dielectric structures may be formed by etching an opening between metallization structures of the transistors from a back side of the device substrate and by depositing liner and fill dielectrics over the back-side opening.