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기록

SEMICONDUCTOR DIE PACKAGES INCLUDING NON-ACTIVE DIES AND METHODS OF FORMATION

발명심사 중
1조회수
20청구항 · 3 독립항
§ Ⅰ

개요

발명자

Tzu Jung TIEN; Jen-Yuan CHANG

IPC 분류

H1L 23/498H1L 23/H1L 23/367H1L 25/65

CPC 분류

H1L23/49838H1L23/3675H1L23/49816H1L24/5H1L24/13H1L25/652H1L2224/5009H1L2224/5025H1L2224/13009H1L2224/13026H1L2924/1029H1L2924/1431H1L2924/1434H1L2924/15311H1L2924/351

A first integrated circuit (IC) die is directly bonded together with a second IC die in a vertical arrangement in a semiconductor die package. The smaller physical size of the first IC die enables a plurality of non-active dies to be placed over the second IC die in areas not occupied by the first IC die. Including a plurality of non-active dies enables the non-active dies to be customized for the different attributes of different areas of the second IC die, including different thermal profiles of the different areas of the second IC die. In this way, including a plurality of non-active dies in the semiconductor die package may increase the thermal stability of the semiconductor die package, which may prolong the operational lifetime of the IC dies, may reduce the likelihood of failure of the IC dies, and/or may increase the overall reliability of the semiconductor die package.

원문 (중국어)

A first integrated circuit (IC) die is directly bonded together with a second IC die in a vertical arrangement in a semiconductor die package. The smaller physical size of the first IC die enables a plurality of non-active dies to be placed over the second IC die in areas not occupied by the first IC die. Including a plurality of non-active dies enables the non-active dies to be customized for the different attributes of different areas of the second IC die, including different thermal profiles of the different areas of the second IC die. In this way, including a plurality of non-active dies in the semiconductor die package may increase the thermal stability of the semiconductor die package, which may prolong the operational lifetime of the IC dies, may reduce the likelihood of failure of the IC dies, and/or may increase the overall reliability of the semiconductor die package.