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기록

OPTIMIZED 3D INTEGRATED BACKSIDE POWER DELIVERY STRUCTURE

발명심사 중
4조회수
20청구항 · 2 독립항
§ Ⅰ

개요

발명자

Qianwen Chen; Joshua M. Rubin; Ruilong Xie; Tao Li

IPC 분류

H1L 23/528H1L 23/373H1L 25/65

CPC 분류

H1L23/5286H1L23/3736H1L23/5283H1L25/657H1L2225/6513

An exemplary stacked semiconductor structure includes a first integrated device structure having a first frontside and a first backside in which the first backside comprises a first backside power distribution network, a seconded integrated device structure having a second frontside and a second backside in which the second backside comprises a second backside power distribution network, a plurality of hybrid bond connections between the first frontside and the second frontside, at least one first power bump on the first frontside configured to deliver power to the first backside power distribution network, and at least one second power bump on the second backside configured to deliver power to the second backside power distribution network.

원문 (중국어)

An exemplary stacked semiconductor structure includes a first integrated device structure having a first frontside and a first backside in which the first backside comprises a first backside power distribution network, a seconded integrated device structure having a second frontside and a second backside in which the second backside comprises a second backside power distribution network, a plurality of hybrid bond connections between the first frontside and the second frontside, at least one first power bump on the first frontside configured to deliver power to the first backside power distribution network, and at least one second power bump on the second backside configured to deliver power to the second backside power distribution network.