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기록

SEMICONDUCTOR STRUCTURE INCLUDING DEEP TRENCH CAPACITORS AND METHODS OF FABRICATION THEREOF

발명심사 중
5조회수
20청구항 · 3 독립항
§ Ⅰ

개요

발명자

Tzu Jung TIEN; Cheung CHENG; Chen-Hsuan YEN; Fu-Chiang KUO

IPC 분류

H10D 1/H10D 1/68

CPC 분류

H10D1/42H10D1/714H10D1/716

In an embodiment, a semiconductor structure includes a substrate having a plurality of deep trenches oriented in a first direction and a second direction and a plurality of mesas interposed by the deep trenches. The semiconductor structure also includes a plurality of capacitor groups, wherein each of the capacitor groups includes a stack of conductive layers and node dielectric layers alternately disposed in the deep trenches and a first conductive plug disposed on a first layer of the conductive layers. The semiconductor structure also includes an isolation wall penetrating through the stack of the conductive layers and the node dielectric layers and into at least one of the mesas, the isolation wall being a close loop in a top view.

원문 (중국어)

In an embodiment, a semiconductor structure includes a substrate having a plurality of deep trenches oriented in a first direction and a second direction and a plurality of mesas interposed by the deep trenches. The semiconductor structure also includes a plurality of capacitor groups, wherein each of the capacitor groups includes a stack of conductive layers and node dielectric layers alternately disposed in the deep trenches and a first conductive plug disposed on a first layer of the conductive layers. The semiconductor structure also includes an isolation wall penetrating through the stack of the conductive layers and the node dielectric layers and into at least one of the mesas, the isolation wall being a close loop in a top view.